This application claims the benefit of International Patent Application Serial No. PCT/US10/51778 filed on Oct. 7, 2010. The disclosures of the International Patent Application are hereby incorporated by reference for all purposes.
Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
As electronic circuit design advances increasingly complex integrated systems are developed with high density and throughput. Thus, inter-chip communication on circuit boards involves higher and higher data rates. Increased data rates are, however, associated with high currents, which in turn are major challenges for noise mitigation and power dissipation in circuit design. Parallel communications is one mitigation approach, but at a cost of large circuit board area. Other approaches for higher data rates include using flip-chip or chip-level via technologies, which are associated with reliability, cost, and flexibility concerns. Increasing on-board communication bandwidth is especially challenging in multiprocessor systems.
The present disclosure appreciates that there are several limitations with conventional circuit board designs, especially for high data rate communications. Alternative approaches to overcome the limitations of conventional circuit board designs further include wireless solutions based on capacitive or inductive methods. Capacitive and inductive methods may be effective in reducing power and providing high speed, but they typically work for pairs of chips. Therefore, these approaches are ineffective for multi-chip systems.